1. Field of the Invention
The present invention generally relates to a semiconductor package, and more particularly, to a semiconductor package which is suitable for multi-functionality and high integration.
2. Description of the Related Art
As electronic products are miniaturized, the sizes of packages used in the electronic products have been shrunken, and as various and complex application products are developed, packages capable of performing various functions have been demanded. Under this situation, a system-in-package, in which semiconductor chips with different functions, for example, a system chip, such as a CPU (central processing unit) and a GPU (graphic processing unit), and a memory chip are enclosed in one package to realize a system, is gaining popularity.
As an example of the system-in-package, a structure in which a system chip and a memory chip are horizontally mounted on an interposer and signal transfer between the system chip and the memory chip is implemented through wiring lines formed on the upper surface of the interposer has been suggested.
In order to accommodate the trend toward multi-functionality and high integration, the numbers of inputs/outputs of the system chip and memory chip have been increased and thus the number of wiring lines for signal transfer between the system chip and the memory chip has been increased. In this regard, since the number of wiring lines capable of being formed on the upper surface of the interposer has a limitation, difficulties exist in achieving the multi-functionality and high integration.
While a method of increasing the size of the interposer to enlarge an area for forming wiring lines and a method of thinly forming wiring lines to increase the number of wiring lines to be formed in a unit area have been disclosed, warping may occur when the size of the interposer is increased, and a precise wiring process is required to thinly form the wiring lines, by which the manufacturing cost is likely to rise.